Test Strategy for IoT Devices receives Embedded World 2016 Award

embedded Award 2016At Embedded World 2016 in Nuremberg, JEDOS (GOEPEL’s test and diagnostics tool for electronic assemblies) received the embedded Award 2016 in the tools category.

With the Embedded Award, a high-ranking jury with representatives from science research, industry, and media recognizes innovative products and solutions that advance the industry of embedded systems and the IoT (Internet of Things) in outstanding ways. GOEPEL receives Embedded Award 2016
The award ceremony took place at the official press conference by Prof. Matthias Sturm, Chairman of the Advisory Board of the embedded world, and Dr. Roland Fleck, Managing Director of NürnbergMesse on the first day of Embedded World.

“We are proud of the high recognition our JEDOS test and diagnostic tool enjoys. Winning this award shows us that with our integrated technology platform we’re on the right track”, says Thomas Wenzel, Managing Director of the JTAG/Boundary Scan division of GOEPEL electronic, after accepting the award. JEDOS awarded at Embedded World 2016“By integrating embedded diagnostics test and JTAG/boundary scan, we are addressing the latest test challenges posed by complex electronic designs, such as Internet of Things components.”

First introduced in 2015, JEDOS is a platform for high-quality embedded tests of complex electronic design. JEDOS offers a variety of functions for test, validation, calibration, and device programming. Using the native processor, diagnostic functional tests can be performed in real time. A key advantage of JEDOS is the possibility to fully test IoT components without the use of firmware. By integrating of boundary scan and functional embedded test and diagnostics, dependable test and fault coverage can be achieved. As a result, firmware and software engineers can benefit from pre-verified prototype hardware, making their development and debug work more efficient.

To learn more about JEDOS, please view this webinar or contact GOEPEL.

Everything you need to know about embedded real-time functional test

Can you imagine an embedded diagnostic operating system suitable for use in lab and production; capable of performing both at-speed / real-time diagnostic functional tests and high-speed in-system flash programming?

Intrigued? Attend our upcoming webinar on January 26th, at 11 AM EST, 8 AM PST (16:00 UTC).

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Test Optimization in Production through the Use of Boundary Scan

View our latest webinar recording on “Test Optimization in Production – Reduction of Test Time through the Use of Boundary Scan” to learn how you can reduce test time and complex interface hardware through the use of JTAG/Boundary Scan. While Boundary Scan as a test methodology has been around for more than 25 years, its advantages for production test often are still underestimated.
And, over the years this technology has seen a lot of innovation.

Designers and test planners alike are confronted with the same problem: to ensure sufficient test access despite increasing miniaturization and simultaneous increase in functionality and complexity of modern electronics.
“Every circuit node needs a test point!” Many of you have heard this statement. But this is no longer possible on modern electronics. Join us in this webinar to learn about powerful and cost saving methods to utilize boundary-scan and related technologies in manufacturing test.

Topics that will be addressed during the webinar:

  • “JTAG / Boundary Scan” nowadays is much more than just connectivity test.
  • Utilize the UUT’s FPGA or microprocessor as an embedded test system.
  • Testing that previously required high numbers of test probes can still be done when physical external access is no longer possible.


Target audience:  Test engineers, test managers, production engineers, production managers, CEOs, contract designers and contract manufacturers, design engineers and design managers.


Level:  Beginners and advanced users.


This webinar was originally presented on November 3, 2015.

Feel free to view the webinar recording by following this link

SCANVISION III Layout and Schematic Visualization in CASCON GALAXY

Watch this short video to get a brief overview of some of the SCANVISION tools and features available in GOEPEL’s CASCON GALAXY software. SCANVISION is a software tool for the visualization of layout and schematic files for printed circuit board assemblies, tightly integrated in the JTAG / boundary-scan software environment CASCON GALAXY.


To learn more about SCANVISION or other tools in CASCON GALAXY, please visit www.goepelusa.com or contact us.

SYSTEM CASCON Quick Reference Guide

This blog entry provides a quick reference guide for CASCON GALAXY Development Station packages. GOEPEL offers a variety of software packages for the development and execution of Embedded System Access (ESA) applications, such as JTAG / boundary-scan test, in-system programming, processor emulation test, and control of chip-embedded instrumentation. Some of those software packages are configured for test development (DS packages) and some for test execution only (TS packages).

Quick Reference Guide

Quick Reference Guide for CASCON GALAXY DS packages – click to enlarge.

The table on the right provides a quick reference of the tools included in the four major CASCON GALAXY Development Station (DS) packages:

  • CASCON GALAXY Base Edition,
  • Standard Edition,
  • Classic Edition, and
  • Advanced Edition.


Contact GOEPEL for more information on any of its software and hardware products.